FPGA Design Engineer

Altimeter Solutions
    February 21, 2020
    Clifton, NJ
    Job Type



    • Generate FPGA level derived requirements from module level flow down.
    • Perform preliminary design at the functional block and FPGA level.
    • Code and simulate at the functional block and FPGA level using VHDL.
    • Generate FPGA IP using the Xilinx Vivado tool suite.


    Minimum Qualifications:

    • Bachelors, or BSEE (or equivalent) with applicable FPGA design experience with VHDL
    • Thorough understanding of FPGA design processes including requirements generation, preliminary design, detailed design including code & simulation peer reviews, place & route, timing closure, test plan generation, and integration and test.
    • Understanding of architectural elements within Xilinx 7 series, Ultrascale or Ultrascale+ family FPGAs.
    • Understanding of how VHDL code translates into logic primitives within a Xilinx FPGA.
    • Able to work with a team of designers to generate FPGA solutions.
    • Able to simulate FPGA designs to verify functional performance and code coverage.
    • Experience with Cadence Incisive simulator preferred.
    • Understanding of static timing analysis and the process by which timing closure is achieved.


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